In the semiconductor industry, it is well known that device performance can be increased by introducing strain into a semiconductor channel of a metal oxide semiconductor field effect transistor (MOSFET). A strained semiconductor channel can be produced, for example, by depositing Si epitaxially on a relaxed SiGe material. The strain is created from the difference in lattice spacing between Si and SiGe.
Conventional strained Si typically uses a relatively thick (on the order of about 500 nm or greater) layer of SiGe to exert a strain on a top layer of relatively thin (on the order of about 20 nm or less) Si. The larger Ge atoms stretch or strain the top lattice of Si resulting in marked improvement of the transistors. However, the presence of the SiGe layer causes material and process integration challenges. The need to thin the active Si and SiGe layers for high-performance complementary metal oxide semiconductor (CMOS) technology makes the approach of building the transistors on top of a SiGe layer too difficult.
A strained semiconductor directly-on-insulator (SSDOI or just SSOI) structure bypasses the SiGe layer thereby providing higher device performance, while eliminating material and process integration problems.
In the prior art, a SSOI is typically fabricated by utilizing a layer transfer process. In such a process, an ultra-thin layer (on the order of about 30 nm or less) of Si is first formed epitaxially (i.e., layer by layer growth) on a relaxed SiGe layer. Next, an oxide layer is formed atop the ultra-thin layer of strained Si. After hydrogen is ion implanted into the SiGe layer, the wafer is flipped and bonded to a handle substrate. A high temperature (on the order of about 800° C. or greater) process splits away most of the original wafer, leaving the strained Si and SiGe layers on top of the oxide layer. Alternatively, a chemical surface activation method can be used to split the wafers at lower temperature (on the order of about 200° to about 400° C.). The SiGe layer is then completely removed and transistors are fabricated on the remaining ultra-thin strained Si.
The aforementioned prior art method of fabricating SSOI substrates is complicated and expensive since it involves epitaxial growth and a subsequent wafer bonding process. As such, a new and improved method of fabricating SSOI (or SSDOI) is needed that is cost-effective which eliminates the need for utilizing epitaxial growth and wafer bonding.